CocoFLASH is a multi-ROM emulator for the Tandy Color Computer Systems 1, 2, and 3. It offers 8 megabytes of ROM storage, supports >32kB ROM images (like RoboCop) and includes built-in support for the Tandy Orchestra 90 Stereo Music Synthesizer cartridge.
CocoFLASH requires a Tandy/Radio Shack Color Computer 1, 2, or 3 machine. It may also work on the Tano Dragon 32 and 64
machines, as well as the Prologica CP400 Color
Though the unit arrives with software pre-installed, the same software can be found here
The CocoFLASH can be purchased here
CocoFLASH places an 8 megabyte FLASH ROM into the Color Computer address space at $8000-$ffef. Since the entire 8MB ROM cannot be mapped into the limited address space of the CoCo, a "banking" system is utilized, where the ROM location $8000 (as seen by the Color Computer) can be moved to any 4kB boundary of the FLASH ROM. Additionally, to support multi-bank cartridges like RoboCop, which used a 16kB "offset" register to select various 16kB "pages" of ROM, CocoFLASH emulates this register as well.
Thus, to determine the actual FLASH ROM location that resides in the Coco memory map, one can utilize the following formula:
FLASH ROM location = CoCo Memory Location - $8000 + (bank * 4096) + (page * 16384).
To configure CocoFLASH, the unit provides 4 relocatable registers at $ff64-$ff67. The registers are described as follows:
7:4bits 7:4 of bank registerbits 7:4 of bank register or Device Family
||Enable FLASH Write at $c000 (1 = enabled)
||Read Bank or Device ID (1 = Device ID visible)
||Enable offset register (1 = enabled) (Note 1)
||Force single reset (1 = selected)
||Select SPI source
- 00 = none
- 01 = EEPROM
- 10 = Secondary SPI channel
- 11 = Third SPI channel (not currently implemented)
||Autostart (1 = on)
||Left switch (1 = pressed)
||LED (1 = on)
||Right switch (1 = pressed)
||bits 7:0 of bank register
||bits 7:0 of bank register or Device ID
||0 or Device Version
||bits 10:8 of bank register (bit 3 is 0)
||bits 10:8 of bank register or CONFIG jumper values
||SPI data out
||SPI data in (Note 2)
- If the offset bit is enabled, any write to locations from $ff40 to $ff5f will store a new value in the offset register, shown in Table 2.
- The SPI subsystem operates at main CPU speed. Thus, when writing a value to the SPI data register, one must wait 8 cycles before attempting to read from the register.
|Table 2: Offset Register
|$ff40-$ff5f (Note 1)
- Any location utilized by CocoFLASH or the built-in Orchestra 90-CC will not store a new value into the offset register.
In addition, the Tandy Radio Shack Orchestra 90-CC cartridge is emulated within CocoFLASH. The cartridge defaults to a base address of $ff7a, but can be altered through software. The cartridge emulation is enabled by default, but can be disabled.
Orchestra 90-CC Registers
The Tandy/Radio Shack Orchestra 90-CC functionality has been slightly expanded, in that reads from the 2 IO locations will return valid data, as per the following table:
||Device Family ($1)
||Device ID ($1)
Cartridge Configuration Register
Both CocoFLASH and Orchestra 90-CC registers can be relocated under software control. To minimize conflicts and place as few constraints on the remapping system as possible, the system utilizes an unlocking mechanism and commands to reconfigure the cartridge.
To unlock the command system, one must send a special sequence of values to the command register, located at $ff80. The sequence is $55,$aa,<DEVICE_FAMILY:DEVICE_ID>. Since one cannot be sure the sequence has not already been started, it is recommended that the program read from $ff80 before sending the command sequence, which will reset the command system.
The device families and IDs are listed below:
||Tandy/RS Orchestra 90-CC
Once the proper sequence is sent, a program must send a command to execute. Currently, only 1 command is supported:
|Set Base Address
||low byte of desired base address (setting high bit will hide device from IO memory)
To ensure command functionality works correctly when the device resides in the Tandy/RS Multi-Pak Interface (MPI), the device asserts SLENB on any write access to $ff80, which ensure the MPI will deliver the requested data.